Product Summary
The 74HC174D is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC174D has six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register 74HC174D is fully edge-triggered. The state of each D input, one set-up time prior to the LOW-to-HIGH clock transition, is transferred to the corresponding output of the flip-flop.
Parametrics
74HC174D absolute maximum ratings: (1)Number of Circuits: 1; (2)Logic Family: HC; (3)Logic Type: D-Type Edge Triggered Flip-Flop; (4)Polarity: Non-Inverting; (5)Input Type: Single-Ended ; (6)Propagation Delay Time: 17 ns at 5 V; (7)High Level Output Current: - 5.2 mA; (8)Supply Voltage (Max): 6 V; (9)Maximum Operating Temperature: +125℃; (10)Mounting Style: SMD/SMT; (11)Package / Case: SOT-109; (12)Packaging: Reel; (13)Minimum Operating Temperature: - 40 ℃; (14)Number of Input Lines: 0; (15)Number of Output Lines: 0; (16)Standard Pack Qty: 2500; (17)Supply Voltage (Min): 2 V.
Features
74HC174D features: (1)Six edge-triggered D-type flip-flops; (2)Asynchronous master reset; (3)Output capability: standard; (4)ICC category: MSI.
Diagrams
Image | Part No | Mfg | Description | Pricing (USD) |
Quantity | |||||||||||||
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74HC174D |
NXP Semiconductors |
Flip Flops HEX D F-F POS-EDGE W/RESET |
Data Sheet |
Negotiable |
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74HC174D,652 |
NXP Semiconductors |
Flip Flops HEX D F-F POS-EDGE |
Data Sheet |
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74HC174D,653 |
NXP Semiconductors |
Flip Flops HEX D-TYPE MASTER RESET |
Data Sheet |
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74HC174DB,118 |
NXP Semiconductors |
Flip Flops HEX D-TYPE MASTER |
Data Sheet |
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74HC174DB,112 |
NXP Semiconductors |
Flip Flops HEX D-TYPE MASTER |
Data Sheet |
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74HC174DB |
NXP Semiconductors |
Flip Flops HEX D-TYPE MASTER RESET |
Data Sheet |
Negotiable |
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74HC174DB-T |
NXP Semiconductors |
Flip Flops HEX D-TYPE MASTER RESET |
Data Sheet |
Negotiable |
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